From 24bce89e4663baaa28332887d5b531fa03ebb252 Mon Sep 17 00:00:00 2001
From: Sam Anthony <sam@samanthony.xyz>
Date: Thu, 23 Oct 2025 15:53:20 -0400
Subject: can tx systest

---
 fw/tests/system/can_tx_systest.c | 58 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 fw/tests/system/can_tx_systest.c

diff --git a/fw/tests/system/can_tx_systest.c b/fw/tests/system/can_tx_systest.c
new file mode 100644
index 0000000..a770d06
--- /dev/null
+++ b/fw/tests/system/can_tx_systest.c
@@ -0,0 +1,58 @@
+#include <xc.h>
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "system.h"
+#include "types.h"
+#include "spi.h"
+#include "can.h"
+
+// Frame to transmit periodically
+static const CanFrame frame = {
+	.id = {
+		.type = CAN_ID_STD,
+		.sid = {0x01, 0x23},
+	},
+	.dlc = 8u,
+	.data = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77},
+	.rtr = false,
+};
+
+static U8 ctr = 0u; // timer
+
+void
+main(void) {
+	sysInit();
+	spiInit();
+	canInit();
+
+	// Setup MCP2515 CAN controller
+	canSetBitTiming(CAN_TIMING_10K);
+	canSetMode(CAN_MODE_NORMAL);
+
+	// Setup TMR1
+	T1CON = 0x31; // Fosc/4, 1:8 prescaler
+	PIE1bits.TMR1IE = 1; // enable interrupts
+	PIR1bits.TMR1IF = 0; // clear flag
+
+	// Enable interrupts
+	INTCON = 0x00; // clear flags
+	INTCONbits.PEIE = 1; // enable peripheral interrupts
+	INTCONbits.GIE = 1; // enable global interrupts
+
+	for (;;) {
+
+	}
+}
+
+void
+__interrupt() isr(void) {
+	if (PIR1bits.TMR1IF) {
+		if (++ctr == 23u) { // 1s period
+			(void)canTx(&frame);
+			ctr = 0u;
+		}
+		PIR1bits.TMR1IF = 0;
+	}
+}
-- 
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