ATA6563, N24C32, and STM32C092 symbols

1 files changed, 41 insertions, 0 deletions

diff --git a/hw/symbols/N24C32UDTG/KiCad/SOP50P312X90-8N.kicad_mod b/hw/symbols/N24C32UDTG/KiCad/SOP50P312X90-8N.kicad_mod
new file mode 100644
index 0000000..1590013
--- /dev/null
+++ b/hw/symbols/N24C32UDTG/KiCad/SOP50P312X90-8N.kicad_mod
@@ -0,0 +1,41 @@
+(module "SOP50P312X90-8N" (layer F.Cu)

+  (descr "8 LEAD SOICCDHJ")

+  (tags "Integrated Circuit")

+  (attr smd)

+  (fp_text reference IC** (at 0 0) (layer F.SilkS)

+    (effects (font (size 1.27 1.27) (thickness 0.254)))

+  )

+  (fp_text user %R (at 0 0) (layer F.Fab)

+    (effects (font (size 1.27 1.27) (thickness 0.254)))

+  )

+  (fp_text value "SOP50P312X90-8N" (at 0 0) (layer F.SilkS) hide

+    (effects (font (size 1.27 1.27) (thickness 0.254)))

+  )

+  (fp_line (start -2.275 -1.3) (end 2.275 -1.3) (layer F.CrtYd) (width 0.05))

+  (fp_line (start 2.275 -1.3) (end 2.275 1.3) (layer F.CrtYd) (width 0.05))

+  (fp_line (start 2.275 1.3) (end -2.275 1.3) (layer F.CrtYd) (width 0.05))

+  (fp_line (start -2.275 1.3) (end -2.275 -1.3) (layer F.CrtYd) (width 0.05))

+  (fp_line (start -1.15 -1) (end 1.15 -1) (layer F.Fab) (width 0.1))

+  (fp_line (start 1.15 -1) (end 1.15 1) (layer F.Fab) (width 0.1))

+  (fp_line (start 1.15 1) (end -1.15 1) (layer F.Fab) (width 0.1))

+  (fp_line (start -1.15 1) (end -1.15 -1) (layer F.Fab) (width 0.1))

+  (fp_line (start -1.15 -0.5) (end -0.65 -1) (layer F.Fab) (width 0.1))

+  (fp_line (start -0.8 -1) (end 0.8 -1) (layer F.SilkS) (width 0.2))

+  (fp_line (start 0.8 -1) (end 0.8 1) (layer F.SilkS) (width 0.2))

+  (fp_line (start 0.8 1) (end -0.8 1) (layer F.SilkS) (width 0.2))

+  (fp_line (start -0.8 1) (end -0.8 -1) (layer F.SilkS) (width 0.2))

+  (fp_line (start -2.025 -1.25) (end -1.15 -1.25) (layer F.SilkS) (width 0.2))

+  (pad 1 smd rect (at -1.588 -0.75 90) (size 0.3 0.875) (layers F.Cu F.Paste F.Mask))

+  (pad 2 smd rect (at -1.588 -0.25 90) (size 0.3 0.875) (layers F.Cu F.Paste F.Mask))

+  (pad 3 smd rect (at -1.588 0.25 90) (size 0.3 0.875) (layers F.Cu F.Paste F.Mask))

+  (pad 4 smd rect (at -1.588 0.75 90) (size 0.3 0.875) (layers F.Cu F.Paste F.Mask))

+  (pad 5 smd rect (at 1.588 0.75 90) (size 0.3 0.875) (layers F.Cu F.Paste F.Mask))

+  (pad 6 smd rect (at 1.588 0.25 90) (size 0.3 0.875) (layers F.Cu F.Paste F.Mask))

+  (pad 7 smd rect (at 1.588 -0.25 90) (size 0.3 0.875) (layers F.Cu F.Paste F.Mask))

+  (pad 8 smd rect (at 1.588 -0.75 90) (size 0.3 0.875) (layers F.Cu F.Paste F.Mask))

+  (model N24C32UDTG.stp

+    (at (xyz 0 0 0))

+    (scale (xyz 1 1 1))

+    (rotate (xyz 0 0 0))

+  )

+)