diff options
Diffstat (limited to 'fw')
| -rw-r--r-- | fw/can.h | 4 | ||||
| -rw-r--r-- | fw/dac.h | 8 | ||||
| -rw-r--r-- | fw/eeprom.h | 4 | ||||
| -rw-r--r-- | fw/main.c | 6 | ||||
| -rw-r--r-- | fw/spi.c | 6 |
5 files changed, 14 insertions, 14 deletions
@@ -15,8 +15,8 @@ */ // Pin mapping -#define CAN_CS_TRIS TRISAbits.TRISA5 -#define CAN_CS LATAbits.LATA5 +#define CAN_CS_TRIS TRISA5 +#define CAN_CS RA5 // Bit timings (CNF1, CNF2, CNF3) #define CAN_TIMING_10K 0xDD, 0xAD, 0x06 // BRP=30, PropSeg=6, PS1=6, PS2=7, SP=65%, SJW=4 @@ -12,10 +12,10 @@ */ // Pin mapping -#define DAC1_CS_TRIS TRISBbits.TRISB7 -#define DAC1_CS LATBbits.LATB7 -#define DAC2_CS_TRIS TRISBbits.TRISB5 -#define DAC2_CS LATBbits.LATB5 +#define DAC1_CS_TRIS TRISB7 +#define DAC1_CS RB7 +#define DAC2_CS_TRIS TRISB5 +#define DAC2_CS RB5 void dacInit(void); diff --git a/fw/eeprom.h b/fw/eeprom.h index 8d3d391..841b659 100644 --- a/fw/eeprom.h +++ b/fw/eeprom.h @@ -12,8 +12,8 @@ */ // Pin mapping -#define EEPROM_CS_TRIS TRISCbits.TRISC5 -#define EEPROM_CS LATCbits.LATC5 +#define EEPROM_CS_TRIS TRISC5 +#define EEPROM_CS RC5 typedef U16 EepromAddr; @@ -114,8 +114,8 @@ loadSigFmts(void) { Status status; // Disable interrupts so the volatile address pointers can be passed safely - oldGie = INTCONbits.GIE; - INTCONbits.GIE = 0; + oldGie = GIE; + GIE = 0; for (k = 0u; k < NSIG; k++) { status = serReadSigFmt(sigFmtAddrs[k], (SigFmt *)&sigFmts[k]); @@ -186,7 +186,7 @@ main(void) { // Enable interrupts INTCON = 0x00; // clear flags - OPTION_REGbits.INTEDG = 0; // interrupt on falling edge of INT pin + INTEDG = 0; // interrupt on falling edge of INT pin INTE = 1; // enable INT pin PEIE = 1; // enable peripheral interrupts GIE = 1; // enable global interrupts @@ -11,9 +11,9 @@ void spiInit(void) { U8 junk; - TRISBbits.TRISB4 = IN; // SDI - TRISCbits.TRISC7 = OUT; // SDO - TRISBbits.TRISB6 = OUT; // SCK + TRISB4 = IN; // SDI + TRISC7 = OUT; // SDO + TRISB6 = OUT; // SCK SSPSTAT = 0x40; // CKE=1 SSPCON1 = 0x22; // FOSC/64 => 750kHz SPI clock |